1. Field of the Invention
This invention relates to spincups used during integrated circuit fabrication.
2. Description of Related Art
Integrated circuit fabrication on a wafer, such as a silicon wafer, involves interconnecting individual electrical circuit features to create electrical circuits. The individual electrical circuit features are often characterized by dimensions ranging from several microns to sub-micron. To create the individual circuit features, lithographic processes are used to form patterns on the wafer. The patterns define the physical regions occupied by the individual circuit features. Lithographic processes involve applying photoresist materials to a wafer and selectively exposing the photoresist through a mask (or reticle in step and repeat projection systems). Lithographic processes further involve a development process for developing the photoresist by applying a solvent known as a developer to form patterns which define individual electrical circuit features. To fabricate many small, individual circuit features on a single wafer, the patterns defining the individual circuit features are extremely precise. The precision of the patterns can be adversely affected by contaminants on the wafer and by a non-planar wafer surface.
Wafer contamination, wafer deformation, and the introduction of factors that can cause such may occur during various phases of wafer processing. For example, when developing the photoresist in a spincup, particles from sources such as developer which fail to adhere to the frontside of the wafer undergoing processing and contaminants present in the spincup may disadvantageously deposit on the backside of the wafer. When the backside portion of the wafer, with backside deposits present, is placed on a surface, the wafer may deform due to the forces exerted by the backside deposited particles. Because of the small individual electrical circuit feature dimensions, even slight deformation can result in the distortion of patterns which define the feature dimensions. Pattern distortion may result in a malformed and/or misaligned individual circuit feature which may render one or more electrical circuits on the wafer useless. Additionally, particles deposited on the backside of the wafer are a source of potential contamination during wafer processing. Contaminants in the process environment have well known disadvantageous effects.
Utilization of a spincup in the development process is described in further detail with reference to FIGS. 1 and 2. FIG. 1 illustrates a top plan view of a spincup assembly having spincup 100 and chuck 118, and FIG. 2 illustrates a cross-sectional view of the spincup assembly in FIG. 1. The spincup 100 is used in conjunction with a developer machine (not shown). Referring to FIGS. 1 and 2, chuck 118 extends through base 104 and supports wafer 204 within spincup 100. An ambient region 210 is bounded by the frontside of wafer 204, spincup sidewalls 102, particle guard 106, the openings of drain holes 108a-108f, a portion of base 104 extending between particle guard 106 and spincup sidewalls 102, and a cover (not shown) over spincup 100. A portion of developer dispensing nozzle 202 is shown in FIG. 2 positioned above the frontside of wafer 204. A remaining portion of developer dispensing nozzle 202 (not shown) is attached to a developer reservoir (not shown) which includes a developer such as an alkaline solution diluted with water or an organic solvent. During developer application to wafer 204, the developer dispensing nozzle 202 dispenses a spray of the developer under pressure in the direction of the frontside of wafer 204. In order to obtain approximately uniform developer deposition on the frontside of wafer 204, wafer 204 is spun at a rate of approximately 4000 rpm. Following the deposition of developer, chemical reactions involving developer in contact with exposed photoresist (unexposed photoresist in negative development processes) occur. Following the cessation of developer deposition, approximately one and a half minutes elapse before dispensing a rinse solution to allow for completion of the photoresist/developer reactions. The rinse solution, such as deionized water, is also dispensed through developer dispensing nozzle 202 to rinse wafer 204.
During developer dispensing onto wafer 204 many particles from various sources and for various reasons are present in the ambient region 210 during development processing. Some developer particles adhere to the frontside of wafer 204 while other developer particles are spun off the frontside of wafer 204 into the ambient region 210. Furthermore, some developer particles impact the wafer 204 frontside and deflect into the ambient region 210. Additionally, some particles such as contaminants present in the spincup 100 and photoresist/developer reaction products are present in the ambient region 210 during developer dispensing. Some of the particles which fail to adhere to the frontside of wafer 204 accumulate at the base 104 during developer dispensing and are drained through exhaust/drain opening 110 through exhaust/drain shaft 206 into a fluid reservoir (not shown). Some of the particles form a developer-photoresist reaction products-contaminant particle mist ("developer particle mist") in the ambient region 210 which substantially occupies the ambient region 210. A vacuum generator (not shown) connected to exhaust/drain shaft 206 creates a negative pressure differential between the ambient region 210 and the exhaust/drain opening 110 to progressively evacuate the developer particle mist from the ambient region 210.
During rinse solution dispensing onto wafer 204 many particles from various sources and for various reasons are present in the ambient region 210 during development processing. When dispensing rinse solution onto wafer 204, rinse solution and photoresist/developer reaction products are spun off the frontside of wafer 204 and into ambient region 210. Some of the rinse solution and photoresist/developer reaction products impact the wafer 204 frontside and deflect into the ambient region 210. Additionally, other particles such as contaminants are present in the ambient region 210 during rinse solution dispensing. Some of the particles accumulate at the base 104 during developer dispensing and are drained through exhaust/drain opening 110 through exhaust/drain shaft 206 into a fluid reservoir (not shown). Some of the particles form a rinse solution-photoresist/developer reaction products-contaminants particle mist ("rinse particle mist") in the ambient region 210 which substantially occupies the ambient region 210. A vacuum generator (not shown) connected to exhaust/drain shaft 206 creates a negative pressure differential between the ambient region 210 and the exhaust/drain opening 110 to progressively evacuate the solution particle mist from the ambient region 210.
Spincup 100 includes back rinse nozzles 111 and 112 which are connected to a rinse solution source (not shown). Back rinse nozzles 111 and 112 spray deionized water onto the backside periphery of wafer 502 in an attempt to prevent deposition thereon. However, some of the particles present in the ambient region 210, such as particles in the particle mist, nevertheless reach the backside of wafer 204 and enter wafer backside region 208. Drain holes 108a-108f extend through particle guard 106 into the ambient region 210 and are intended to drain any fluid present in wafer backside region 208.
Spincup 100 further includes back blow nozzles 116 (the back blow nozzles are collectively identified as 116) which are evenly spaced apart and open beneath wafer 204 between blocking wall 114 and chuck 118. Back blow nozzles 116 are connected to a gas source (not shown), such as a nitrogen gas reservoir, and blow a gas against the backside of wafer 204. The gas from back blow nozzles 116 attempts to prevent rinse particles from reaching a backside portion of wafer 204 immediately proximate to chuck 118 between blocking wall 114 and chuck 118.
Some of the particles in the particle mist not only enter wafer backside region 208, they disadvantageously deposit on the backside of wafer 204. The material deposition on the backside of wafer 204 disadvantageously affects the yield of functional electrical circuits on the wafer and increases integrated circuit costs.